Browsing by Author "Hasan, Abul"

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    Frequency Agile and Low Power Homodyne Radio Receivers
    (2018-05-29) Hasan, Abul; Helaoui, Mohamed; Belostotski, Leonid; Ghannouchi, Fadhel M.; Sesay, Abu-Bakarr; O'Keefe, Kyle Patrick Gordon; Wu, Ke
    More than 100 billion devices are expected to be connected wirelessly by 2020 as expected from the Internet of Things (IoT) and 5G deployments. Reconfigurability and sustainable power consumption are two of the major concerns to cope up with the expected changes. In the light of the above challenges, two low-power, frequency agile and broadband radio receiver architectures, namely, the six-port receiver (SPR) and the N-path passive mixer (P-M) receiver, have been explored in this thesis. First, a complexity reduced calibration approach for the SPR is developed that would reduce the power consumption of the SPR system. After analyzing the advantages and drawbacks of the SPR and the N-path P-M receiver architectures, a new quadrature phase shift frequency selective (QPS-FS) receiver architecture is proposed that attempts to retain the advantages of both the existing architectures while it tries to eliminate or minimize their drawbacks. The proposed QPS-FS receiver is a frequency selective architecture in which the desired band RF signal at the signal carrier frequency equal to the local oscillator clock frequency is frequency down-converted and quadrature (I/Q) demodulated while the in- and out-of-band blocker and interferer signals are reflected and collected that could be used for energy harvesting purposes. The thesis culminates in the proposal and implementation of a novel broadband, frequency reconfigurable, low power, blockers and system impairments tolerant energy harvesting radio receiver architecture that is frequency selective, concurrently utilizing the in-band RF signal for information decoding and the in- and out-of-band blocker and interferer signals for energy harvesting for increased battery-life or self-sustainable operation of the receiver system.
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    Modeling and Calibration of Multi-Port Based Receiver Systems Mitigating System Imperfections and Hardware Impairments
    (2012-09-26) Hasan, Abul; Helaoui, Mohamed
    Six-port based homodyne receiver architecture is a low power and low cost alternative to the conventional homodyne receiver using diode based mixers. The problems of dc-offset, I/Q cross-talk, high conversion loss and nonlinearities due to diode mixers are some of the issues that make the conventional homodyne receiver architecture not very useful for practical low power communication systems employing envelope varying modulation scheme signals. The radio frequency (RF) front-end in a typical six-port based receiver (SPR) consists of a linear and passive six-port junction circuit that can be easily designed to cover a very large bandwidth. This makes the SPR concept an attractive candidate for software defined radio (SDR) receiver applications. The six-port based RF front-end provides low loss and doesn’t pose any nonlinearity issues. Sources of errors due to circuit and system components impairments can be easily calibrated and compensated in a SPR system as shown in this thesis.
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    Performance Driven Six-Port Receiver and Its Advantages over Low-IF Receiver Architecture
    (2014-02-23) Hasan, Abul; Helaoui, Mohamed
    This paper provides an extensive analysis of the performance of a six-port based direct conversion receiver (SPR) in terms of signal quality, dynamic range, noise figure, ports matching, isolation, bandwidth, and cost. Calibration technique using multimemory polynomials has been adopted in order to improve the signal quality of the six-port receiver. The performances of the calibrated receiver are then compared with the performances of a commercially available I-Q demodulator used as a low-IF receiver. The main advantages and disadvantages of the SPR compared to the low-IF receiver are highlighted. The major advantages of the SPR come in terms of its available input frequency bandwidth and the low power requirement. The SPR system requires no external bias supply but suffers in terms of the available conversion gain. A better port matching of the SPR can be guaranteed over a wide frequency bandwidth, which mixer based receiver systems lack. The main component limiting the performance of a SPR is the diode detector. A faster and a better diode detector will alleviate some of the problems highlighted in this paper. The SPR system is calibratable and its error-vector-magnitude performance can be made better than the I-Q demodulator used as a low-IF receiver.