10-Gb/s 0.13-um CMOS Inductorless Modified-RGC Transimpedance Amplifier

Abstract
This paper presents an inductorless 0.13-um CMOS TIA structure that is a modified version of a regulated cascode (RGC) TIA. An immittance converter is incorporated to reduce power consumption while increasing ransimpedance gain. Measured 3-dB bandwidth is 7 GHz, sufficient for 10-Gb/s operation, in the presence of 250 fF capacitance at the TIA input, representative of typical CMOS photodiode capacitance. The transimpedance gain of the single-stage TIA is 50 dB, and the group-delay variation is less than ±19 ps over the 3-dB bandwidth. The circuit occupies an active area of 180um x 90um and consumes 7 mW from a 1.5-V supply. The measured average input-referred current noise of the TIA is 31 pA/sqrt(Hz). Simulations and analysis show that the proposed single-stage TIA architecture is capable of achieving improvement in the transimpedance limit over a single-stage RGC TIA designed for the same data rate and the same input photodiode capacitance. A comparison of measurement results to published TIAs also demonstrates the competitive performance of the proposed TIA in terms of the TIA transimpendance gain, bandwidth, area, and power consumption.
Description
Keywords
Cross-coupled immittance converter, regulated cascode transimpedance amplifier, transimpedance amplifier
Citation
M. H. Taghavi, L. Belostotski, J. W. Haslett and P. Ahmadi, "10-Gb/s 0.13- \mu{\rm m} CMOS Inductorless Modified-RGC Transimpedance Amplifier," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 8, pp. 1971-1980, Aug. 2015.