HARDWARE VERIFICATION BY FORMAL PROOF

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dc.contributor.authorBirtwistle, Grahameng
dc.contributor.authorGraham, Brianeng
dc.contributor.authorMelham, Tomeng
dc.contributor.authorSchediwy, Richeng
dc.date.accessioned2008-02-27T16:30:01Z
dc.date.available2008-02-27T16:30:01Z
dc.date.computerscience1999-05-27eng
dc.date.issued1988-10-01eng
dc.description.abstractHardware verification is the art of proving formally that, to within the tolerance of an underlying model, a design meets (or perhaps does not meet) its specification. This paper is an introduction to hardware verification and its limitations. We illustrate the technique by specifying and verifying an $x$ or gate and a ripple carry sub-system using the HOL notation, (see [2,8,9]), and then demonstrate its capabilities with sample applications to VLSI CAD and system re-implementation.eng
dc.description.notesWe are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at digitize@ucalgary.caeng
dc.identifier.department1988-328-40eng
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/30382
dc.identifier.urihttp://hdl.handle.net/1880/45726
dc.language.isoEngeng
dc.publisher.corporateUniversity of Calgaryeng
dc.publisher.facultyScienceeng
dc.subjectComputer Scienceeng
dc.titleHARDWARE VERIFICATION BY FORMAL PROOFeng
dc.typeunknown
thesis.degree.disciplineComputer Scienceeng
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