Reliability analysis of logic networks

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dc.contributor.advisorYanushkevich, Svetlana N.
dc.contributor.advisorHaslett, James W.
dc.contributor.authorAbbasinasab, Ali
dc.date.accessioned2017-12-18T22:35:19Z
dc.date.available2017-12-18T22:35:19Z
dc.date.issued2012
dc.descriptionBibliography: p. 68-76en
dc.description.abstractThe reliability of digital devices is threatened by various sources, ranging from architectural issues and process variations to environmental fluctuations and noises. Also, error generated by these sources are inherently stochastic and transient. This makes reliability analysis an indispensable step of circuit design. Several reliability evaluation methods have been proposed for binary logic circuit. However, correlation of reliability with the input and gate errors and reliability analysis of multivalued circuits have not been investigated as of yet. This research investigates the reliability of switching circuits based on probabilistic models, and examines their applicability to multivalued circuits. We also develop an algebraic method for evaluating reliability of multivalued circuits. We further discuss how reliability of k-ary logic networks depends on radix k, input and gate errors. Thereafter, we propose a probabilistic model for representing and detecting faults. This research also studies behavior of probabilistic logic networks for very large (continuous) radix.en
dc.format.extentviii, 110 leaves : ill. ; 30 cm.en
dc.identifier.citationAbbasinasab, A. (2012). Reliability analysis of logic networks (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/4948en_US
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/4948
dc.identifier.urihttp://hdl.handle.net/1880/105949
dc.language.isoeng
dc.publisher.institutionUniversity of Calgaryen
dc.publisher.placeCalgaryen
dc.rightsUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.
dc.titleReliability analysis of logic networks
dc.typemaster thesis
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorUniversity of Calgary
thesis.degree.nameMaster of Science (MSc)
ucalgary.item.requestcopytrue
ucalgary.thesis.accessionTheses Collection 58.002:Box 2100 627942902
ucalgary.thesis.notesUARCen
ucalgary.thesis.uarcreleaseyen
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