Towards Reconfigurable Hardware for In-field Hardware Bug Patches
Date
2024-09-16
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
System-on-chip (SoC) designs are becoming increasingly complex, and the ability to detect and address all possible bugs at design time is highly challenging. Thus, to improve the survivability of SoC designs, it is desirable to be able to patch newly discovered design bugs or potential vulnerabilities in the field. Recently, the idea of hardware-based patching, especially of hardware bugs, has emerged as a complementary approach to software/firmware-based post deployment updates. In anticipating potential problems, designers must invest an upfront cost to implement hardware-based patching infrastructures. My thesis investigates the feasibility of incorporating an embedded field-programmable gate array (eFPGA) fabric as an approach to enable hardware-based patching, i.e., reprogrammable hardware to patch hardware bugs, and explores the resource overhead costs for varying patching architectures. We also characterized different eFPGA configurations to help designers decide the eFPGA design parameters.
Description
Keywords
FPGA, RTL, Security, Hardware Patch, CWE, SoC, eFPGA
Citation
Dharavathu, A. (2024). Towards reconfigurable hardware for in-field hardware bug patches (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca.