Force-Directed Partitioning Technique for 3D IC

atmire.migration.oldid677
dc.contributor.advisorBehjat, Laleh
dc.contributor.authorFakheri Tabrizi, Aysa
dc.date.accessioned2013-01-25T22:48:25Z
dc.date.available2013-06-15T07:01:47Z
dc.date.issued2013-01-25
dc.date.submitted2013en
dc.description.abstract3D IC design is one of the challenging problems of today. 3D partitioning solutions can significantly impact manufacturability and performance of a circuit. In this work, a 3D partitioning technique is developed that reduces the number of TSVs by using force directed placement technique. A circuit is partitioned into several layers and a force directed placement problem is solved to find the optimal locations of the partitions. This partitioning solution is improved by using a proposed force-based simulated annealing technique. The proposed technique is tested on ISPD04 circuits, and shows up to 20% reduction in the number of TSVs.en_US
dc.identifier.citationFakheri Tabrizi, A. (2013). Force-Directed Partitioning Technique for 3D IC (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/26207en_US
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/26207
dc.identifier.urihttp://hdl.handle.net/11023/502
dc.language.isoeng
dc.publisher.facultyGraduate Studies
dc.publisher.institutionUniversity of Calgaryen
dc.publisher.placeCalgaryen
dc.rightsUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.
dc.subjectEngineering--Electronics and Electrical
dc.subject.classification3D ICs, Partitioning, Physical Design, Force-Directed, Simulated Annealingen_US
dc.titleForce-Directed Partitioning Technique for 3D IC
dc.typemaster thesis
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorUniversity of Calgary
thesis.degree.nameMaster of Science (MSc)
ucalgary.item.requestcopytrue
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