VERIFYING SECD IN HOL
| dc.contributor.author | Graham, B. | eng |
| dc.contributor.author | Birtwistle, G. | eng |
| dc.date.accessioned | 2008-02-27T16:30:05Z | |
| dc.date.available | 2008-02-27T16:30:05Z | |
| dc.date.computerscience | 1999-05-27 | eng |
| dc.date.issued | 1991-01-01 | eng |
| dc.description.abstract | This paper describes some of the work done at Calgary on the design of an SECD chip and its verification using the Cambridge HOL proof assistant. The chip is a physical realization of Henderson's variant of Landin's abstract architecture to execute the lambda calculus. The machine uses closures and includes explicit machine instructions to assist recursion. The complete proof, which goes from an abstract specification down to the transistor level, is far too involved to be covered in a single paper. In this paper, we discuss the SECD architecture and design and trace through a portion of the proof of correctness of one sequence of the microcode. | eng |
| dc.description.notes | We are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at digitize@ucalgary.ca | eng |
| dc.identifier.department | 1991-418-2 | eng |
| dc.identifier.doi | http://dx.doi.org/10.11575/PRISM/30398 | |
| dc.identifier.uri | http://hdl.handle.net/1880/45727 | |
| dc.language.iso | Eng | eng |
| dc.publisher.corporate | University of Calgary | eng |
| dc.publisher.faculty | Science | eng |
| dc.subject | Computer Science | eng |
| dc.title | VERIFYING SECD IN HOL | eng |
| dc.type | unknown | |
| thesis.degree.discipline | Computer Science | eng |